Highlights•SHJ PV modules undergo PID characterized by a reduction in short-circuit current.•The reduction is due to optical loss that probably occurs in the front TCO layer.•SHJ PV modules have high PID resistance.•The high reliability can be further improved by using ionomer encapsulants.This letter deals with the potential-induced degradation (PID) of silicon heterojunction (SHJ) photovoltaic (PV) modules. After rapid indoor PID tests applying a voltage of −1000 V at 85 °C, the modules exhibited a significant reduction in short-circuit current density (JscJsc). On the other hand, the dark current density–voltage characteristics of the modules were intact after the PID tests, indicating that the reduction in JscJsc is attributed not to carrier recombination but to optical loss. A degraded module slightly recovered its performance loss upon applying a positive bias but complete recovery was not observed, showing that the PID of SHJ PV modules is not reversible. A module with an ionomer encapsulant showed high PID resistance, revealing that the degradation of SHJ PV modules can be prevented by the use of ionomer encapsulants.

We investigated the influence of indium tin oxide (ITO) sputtering damage to various types of amorphous silicon (a-Si) passivation films deposited by catalytic chemical vapor deposition. Intrinsic (i-) a-Si, n-type (n-) a-Si/i-a-Si, and p-type (p-) a-Si/i-a-Si stacked films were prepared on crystalline Si, and ITO was sputtered at various temperatures and RF powers, followed by post-annealing at 200 °C. Effective minority carrier lifetime (τeff) of almost all the samples decreases drastically after sputtering, while τeff of the samples with ITO sputtered at room temperature recovers significantly by post-annealing. Annealing before sputtering and sputtering at lower RF power leads to more effective recovery of τeff. The samples with ITO sputtered to an n-a-Si/i-a-Si stack show large τeff recovery, while the samples with ITO sputtered to a p-a-Si/i-a-Si stack show much smaller τeff recovery. τeff recovery after ITO sputtering thus depends on the types of a-Si passivation films, which may be related to the modification of band alignment by the existence of ITO.

•We directly observed carrier-lifetime changes due to potential-induced degradation.•The carrier lifetime was reduced by negative bias owing to sodium introduction.•The carrier lifetime decreased by positive bias owing to surface polarization.•These findings qualitatively explain PID in n-type crystalline silicon solar cells.We directly observed reductions in the effective minority-carrier lifetime (τeff) of n-type crystalline silicon (c-Si) substrates with silicon-nitride passivation films caused by potential-induced degradation (PID). We prepared PID-test samples by encapsulating the passivated substrates with standard photovoltaic-module encapsulation materials. After PID tests applying − 1000 V to the c-Si samples from the glass surface, the τeff was decreased, which probably pertains to Na introduced into the c-Si. After PID tests applying + 1000 V, the sample, on the other hand, showed a considerably rapid τeff reduction, probably associated with the surface polarization effect. We also performed recovery tests of predegraded samples, by applying a bias opposite to that used in a degradation test. The τeff of a sample predegraded by applying + 1000 V was rapidly completely recovered by applying − 1000 V, while those of predegraded by applying − 1000 V show only slight and insufficient τeff recovery.

Highlights•n-type rear-emitter photovoltaic modules undergo potential-induced degradation.•Degradation under negative bias is due to enhanced surface recombination.•Degradation under positive bias is almost identical to “polarization effect”.•n-type rear-emitter photovoltaic modules have high PID-resistance.This study addresses the potential-induced degradation (PID) of n-type single-crystalline silicon (sc-Si) photovoltaic (PV) modules with a rear-side emitter. The n-type rear-emitter module configurations were fabricated using n-type bifacial sc-Si solar cells by module lamination with the p+ emitter side down. After the PID tests applying −1000 V, the modules show a rapid decrease in the open-circuit voltage (Voc)(Voc), followed by relatively slower reductions in the fill factor and the short-circuit current density (Jsc)(Jsc). Their dark current density–voltage (J–V  ) data and external quantum efficiencies (EQEs) indicate that the drop in VocVoc is caused by an increase in the saturation current density due to the enhanced surface recombination of minority carriers. In contrast, the modules exhibit slight degradation under +1000 V, which is characterized by only slight decreases in VocVoc and JscJsc. The EQE measurement reveals that these decreases are also attributed to the enhanced surface recombination of minority carriers. This behavior is almost identical to that of the polarization effect in n-type interdigitated back contact PV modules reported in a previous study. By comparing the PID resistance with that of other types of modules, the n-type rear-emitter PV modules are relatively resistant to PID. This may become an advantage of the n-type rear-emitter PV modules.

Catalytic chemical vapor deposition (Cat-CVD) can produce amorphous silicon (a-Si) films with low film stress, in general, compared to plasma-enhanced CVD, and is thus suited for the preparation of precursor a-Si films for thick poly-Si films applied for solar cells. The stress of a-Si films is known to sometimes play an important role for the crystallization of a-Si films and resulting grain size of polycrystalline Si (poly-Si) films formed. I investigate the impact of the stress of Cat-CVD a-Si films on the mechanism of explosive crystallization (EC) induced by flash lamp annealing (FLA). The stress of Cat-CVD a-Si films can be controlled by changing the temperatures of substrates and/or a catalyzing wire during film deposition. Cat-CVD a-Si films with tensile stress (~ 200 MPa) can be deposited as well as films with compressive stress. The enlargement of grain size is observed in a part of flash-lamp-crystallized (FLC) poly-Si films formed from Cat-CVD films with tensile stress compared to those with compressive stress, which might be an indication of a certain degree of impact of film stress on poly-Si formation. The grain size is, however, much smaller than that of FLC poly-Si films formed from electron-beam- (EB-) evaporated a-Si films with similar tensile stress. This fact may indicate the existence of other critical determinants of EC mechanism.

We investigate the impact of the materials of glass substrates on crack formation during flash lamp annealing (FLA) of 4.5 μm-thick precursor amorphous silicon (a-Si) films for the formation of polycrystalline Si (poly-Si) films. The use of soda lime glass substrates, with the largest thermal expansion coefficient (α) and the lowest glass transition temperature (Tg) in glass materials attempted in this study, results in the serious formation of cracks on and inside the glass substrates. Cracks are also seen on the surface of quartz glass substrates, which have much smaller α and higher Tg, after FLA. Furthermore, flash-lamp-crystallized (FLC) poly-Si films have linearly-connected low-crystallinity regions only when quartz glass substrates are used. These facts indicate that the expansion of Si films induces cracks in quartz glass substrates, while the expansion of the upper part of glass is the cause of the crack formation in glass substrates with large α. The generation of cracks is most significantly suppressed when we use alkali-free glass substrates, with a moderate α and a relatively high Tg, which will contribute to the realization of high-quality poly-Si films and high-performance solar cells.Highlights► Crack formation in glass substrates in FLA of a-Si films depends on glass material. ► The use of alkali-free glass substrates results in the suppression of cracks. ► Low-crystallinity regions are formed in poly-Si films when we use quartz substrates. ► Soda lime and borosilicate glass substrates have cracks also inside glass substrates. ► Both relatively high Tg and moderate α are important to suppress crack formation.

Flash lamp annealing (FLA) can induce the explosive crystallization (EC) of micrometer-order-thick amorphous germanium (a-Ge) films. This EC leaves behind periodic microstructures consisting of two regions with different grain features existing alternatively along a lateral crystallization direction. One of the two regions contains a few hundred nm-sized relatively large grains, while such large-sized grains are not seen in the other region. This particular microstructure is similar to that of polycrystalline silicon (poly-Si) films formed through EC induced by FLA. The interval of the periodic structures in the polycrystalline Ge (poly-Ge) of 0.7–0.85 μm is smaller than that in the case of Si of about 1 μm. This is probably due to larger thermal diffusivity of a-Ge than that of a-Si. The speed of the EC is estimated to be 5–7 m/s, which is smaller than the speed of liquid-phase-epitaxy- (LPE-) based EC of ~ 8 m/s for Ge films reported previously. This fact indicates that a crystallization process other than LPE is also involved in this EC, and solid-phase nucleation governs the EC. This is also similar to what have been previously confirmed in Si films, meaning that this particular EC could occur universally in a variety of materials.Highlights► Flash lamp annealing can induce the explosive crystallization of amorphous Ge films. ► Polycrystalline Ge films formed have periodic microstructures. ► The periodic microstructure consists of two regions with different grain features. ► The velocity of explosive crystallization is estimated to be 5–7 m/s. ► This particular crystallization could occur in a variety of materials.

We investigate residual forms of hydrogen (H) atoms such as bonding configuration in poly-crystalline silicon (poly-Si) films formed by the flash-lamp-induced crystallization of catalytic chemical vapor deposited (Cat-CVD) a-Si films. Raman spectroscopy reveals that at least part of H atoms in flash-lamp-crystallized (FLC) poly-Si films form Si–H2 bonds as well as Si–H bonds with Si atoms even using Si–H-rich Cat-CVD a-Si films, which indicates the rearrangement of H atoms during crystallization. The peak desorption temperature during thermal desorption spectroscopy (TDS) is as high as 900 °C, similar to the reported value for bulk poly-Si.

We have fabricated thin-film solar cells using polycrystalline silicon (poly-Si) films formed by flash lamp annealing (FLA) of 4.5-µm-thick amorphous Si (a-Si) films deposited on Cr-coated glass substrates. High-pressure water-vapor annealing (HPWVA) is effective to improve the minority carrier lifetime of poly-Si films up to 10 µs long. Diode and solar cell characteristics can be seen only in the solar cells formed using poly-Si films after HPWVA, indicating the need for defect termination. The actual solar cell operation demonstrated indicates feasibility of using poly-Si films formed through FLA on glass substrates as a thin-film solar cell material.

Polycrystalline Si (poly-Si) films formed by flash lamp annealing of precursor a-Si films on glass substrates have periodic surface roughness spontaneously formed through crystallization, which effectively acts to decrease optical reflection. The surface roughness initially decreases, and then reversely increases with increase in the duration of wet etching, performed to modulate the surface morphology and to reduce optical reflectance. This curious phenomenon can be understood as the selective removal of surface projections, which contain a number of voids, and as different etching rates of large-grain and fine-grain regions. The antireflection effect is enhanced not by the variation of the surface roughness, but rather by the removal of the voids near the surface. The etched poly-Si films covered with antireflection films show remarkably low average reflectance of 3% without any complicated texturing processes, which will lead to the fabrication of high-efficiency solar cells by a simple process.

We investigate the characteristics of amorphous silicon thin film transistors (a-Si TFTs) fabricated by plasma-enhanced chemical vapor deposition (PECVD) and catalytic CVD (Cat-CVD), and their stability under bias and temperature (BT) accelerated stress. The Cat-CVD a-Si TFTs have off-leak current as small as 10− 14 A, and a smaller threshold voltage shift under the BT stress. The superiority in off-leak current and stability is observed in the Cat-CVD a-Si TFTs fabricated at both 320 °C and 180 °C. The high performance and stability of the Cat-CVD a-Si TFTs will enable to use low-cost glass substrates and result in a cost reduction of TFT fabrication.

Super-hydrophobic poly-tetrafluoroethylene (PTFE) films, with a water contact angle of over 160°, are formed by catalytic chemical vapor deposition (Cat-CVD) under high catalyzer temperature or pressure. Hydrophobicity of the PTFE films is maintained even after annealing up to 300 °C. We demonstrate a novel method for forming metal lines using super-hydrophobic PTFE films. Water-based functional liquid containing silver nanoparticles dropped on the patterned PTFE film localizes only on hydrophilic regions, resulting in formation of metal lines after annealing up to 150 °C.

Amorphous Si (a-Si) films with lower hydrogen contents show better adhesion to glass during flash lamp annealing (FLA). The 2.0 µm-thick a-Si films deposited by plasma-enhanced chemical vapor deposition (PECVD), containing 10% hydrogen, start to peel off even at a lamp irradiance lower than that required for crystallization, whereas a-Si films deposited by catalytic CVD (Cat-CVD) partially adhere even after crystallization. Dehydrogenated Cat-CVD a-Si films show much better adhesion to glass, and are converted to polycrystalline Si (poly-Si) without serious peeling, but are accompanied by the generation of crack-like structures. These facts demonstrate the superiority of as-deposited Cat-CVD a-Si films as a precursor material for micrometer-thick poly-Si formed by FLA.

Polycrystalline silicon (poly-Si) films thicker than 1.5 μm, consisting of dense small grains called nano-grain poly-Si (ngp-Si), are formed by flash lamp annealing (FLA) of amorphous silicon (a-Si) films prepared by catalytic chemical vapor deposition (Cat-CVD) method. Crystallinity of the ngp-Si films can be controlled by changing lamp irradiance. Secondary ion mass spectroscopy (SIMS) profiles of dopants in the ngp-Si films after FLA shows no serious diffusion. A minority carrier lifetime of over 5 μs is observed from these ngp-Si films after defect termination process using high pressure water vapor annealing (HPWVA), showing possibility of application for high-efficient thin film solar cells.

Flash lamp annealing (FLA) can form polycrystalline silicon (poly-Si) films with various microstructures depending on the thickness of precursor amorphous Si (a-Si) films due to the variation of crystallization mechanisms. Intermittent explosive crystallization (EC) takes place in precursor a-Si films thicker than approximately 2 μm, and the periodicity of microstructure formed resulting from the intermittent EC is independent of the thickness of a-Si films if their thickness is 2 μm or greater. In addition to the intermittent EC, continuous EC and homogeneous solid-phase crystallization (SPC) also occur in thinner films. These crystallization mechanisms are governed by the ignition of EC at Si film edges and the homogeneous heating of interior a-Si. The results obtained in this study could be applied to control the microstructures of flash-lamp-crystallized poly-Si films.

We investigate the microstructures of polycrystalline silicon (poly-Si) films formed by flash lamp annealing (FLA) of 4.5-μm-thick precursor a-Si films prepared by catalytic chemical vapor deposition (Cat-CVD) on Cr-coated textured glass substrates. Crystallization of a-Si is performed, keeping the dome-shaped structure formed during deposition of a-Si. The poly-Si film consists of densely-packed fine grains with sizes on the order of 10 nm. The grain size tends to increase approaching the Si/Cr interface, which can be understood as the result of solid-phase nucleation and following crystallization. Minority carrier lifetimes of the poly-Si films are worse than those formed on flat substrates. This degradation might be due to gaps in the Si layer formed during a-Si deposition or FLA.